By Jack Mason
Small Times Correspondent
Nanoscale computing took a significant step forward today with Hewlett Packard Co.'s announcement that it has fabricated a 64-bit array that switches molecules on and off inside a grid of nanowires only a square micron in size.
R. Stanley Williams, director of quantum science research at HP Labs, said that the prototype circuit had 10 times the density of today's RAM memory chips and would increase steadily as the technology becomes commercialized in five years.
The first market for the technology would be flash memory for digital cameras and similar portable devices, he said.
The 8 x 8 grid of 40-nanometer platinum wires was made with nanoimprint lithography (NIL), a low-cost technique that stamps structures into a surface rather than etching them with photolithography. The group built the prototype by first constructing a master mold with e-beam lithography. Once made, the mold can quickly and repeatedly stamp a crisscross of channels into which nanowires are formed in a layer of plastic atop a wafer.
Next, a layer of rotaxane molecules is deposited on top of the nanowires, with about 1,000 of these switchable molecules filling each square in the grid. Positive and negative voltage applied to the wires can then turn the clump of molecules on or off to represent the one or zero of a bit of information. Logic circuits built out of the nanowires and switchable molecules enable the encoded data to be read externally.
Williams noted that the device marked the fist time molecular memory has been combined with logic circuits necessary to read and write data.
While molecules in the prototype could only be turned on and off a few hundred times before degrading, Williams said that no effort has yet been made to extend the molecules' lifespan by sealing the device from contaminating oxygen or water vapor molecules.
Williams reported that the memory was also nonvolatile, which means that information stored in the device could be accessed as much as four months later without external power.
To increase the device's capacity from 64 bits to gigabytes per square centimeters, Williams said the lab will work in the years ahead to double the number of nanowires in the grid every year, decrease the size of the wires from 40 to 10 nanometers, and reduce the distance between wires from 100 nanometers to about 40.